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The fetch - decode - execute cycle

Von Neumann processors are not very intelligent! All they can do is to fetch an instruction from memory, decode it (work out what kind of instruction it is) and then execute it (carry it out). It does this on one instruction, and then when it has finished, it does it on the next one, and then the next one, and then the next one, until it has finished. It doesn't do anything else. It just does FETCH - DECODE - EXECUTE over and over again.

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FETCH
The first part of the cycle is FETCH. The CPU goes to the main memory and gets an instruction or piece of data. How does it know where to go in memory? 

    • RAM is made up of boxes.
    • Each box can hold either an instruction or a piece of data or a sort of combination - part instruction and part data.
    • Each of the boxes in RAM has an address.
    • The CPU has a special register called the Program Counter (PC).
    • To 'run' a program, the address of the first instruction in the program is placed in the PC.
    • The CPU then goes to the address in the PC, when it is ready to fetch the next instruction.
    • The PC always holds the address of the next instruction / data to be fetched when the current one has been executed.
    • When the next instruction / data has been fetched, the PC immediately increments (increases by one).
    • When the current instruction has been executed, the CPU looks in the PC to find out where to get the next instruction from in RAM.

More about FETCH

When the CPU has looked in the PC, it knows where to go to get the next instruction or data. But how exactly does it do this?

    • It gets the address from the PC.
    • It places it in a special register called the Memory Address Register (MAR).
    • The address in the MAR then travels along the Address Bus. This is simply a special connection between the CPU and RAM that carries signals.
    • This is how the address is sent to RAM.
    • The contents of the box in RAM with that address are then put on a different bus, called the Data Bus.
    • The data on the data bus is then collected and put into the Memory Data Register (MDR).
    • Once in the MDR, the contents are transferred to yet another register (called the Current Instruction Register, or CIR), ready for decoding.

It sounds like there is a lot of moving data from one register and bus to another, but there are reasons why it has to happen like this. Unfortunately (fortunately?) it is beyond the scope of the GCSE course to go into this in too much detail.

Decode
Once an instruction is in the CIR, the CPU decodes it. That means it simply works out what the instruction is. Sometimes, the instruction might be part instruction and part data. For example, it might decode to ADD 35289. ADD is the instruction but 35289 is an address in memory where the data for the adding can be found! So we have to FETCH it. This is dealt with in exactly the same way as the instruction was fetched.

    • The address is placed in the MAR.
    • The address in the MAR then travels along the Address Bus.
    • The contents of the box in RAM with that address are then put on the Data Bus.
    • The data on the data bus is then collected and put into the Memory Data Register (MDR).

You might have guessed now why an instruction that is fetched and is in the MDR has to be moved from MDR to the CIR. It is because we might need the MDR again to completely decode an instruction!

Execute
Once the instruction has been fetched and decoded, and once any extra data associated with the instruction has been fetched, it can be executed. The Control Unit sends out signals to make the hardware do whatever is required to 'execute' the instruction. If the instruction were ADD 35289, for example, whatever data was in memory location 35389 would be added. But added to what?

Accumulator
The last register you need to know about is the Accumulator. This special register holds the result of any calculations, as well as any temporary values we need to keep handy. ADD 35289 actually means:

Take whatever is in the Accumulator and add it to whatever data is in location 35289.
Store the result in the Accumulator (overwriting whatever was in there before).

Summary
Although it might seem a little long-winded to start with, the FETCH - DECODE - EXECUTE cycle is the same process every time, using the registers in the same way every time. To fully understand it, you need to make sure you know about the following:

    • Program Counter (PC)
    • Memory Address Register (MAR)
    • Memory Data Register (MDR)
    • Current Instruction Register (CIR)
    • Accumulator (ACC)
    • Address bus
    • Data bus

There are other registers but they are for another time!

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